Monday, July 4, 2016

Clock generation in testbench environment

Clock generation is the key of any design and verification environment. There are many ways to generate clock, some of them are listed below:


Method #1 Using always block and negation operator for 50% duty cycle
initial begin
clk = 0;
end
always
  begin
#5 clk = ~clk;
   end

//----------------------------------------------------------------------------//
Method #2 Using always block, negation operator and parameter for 50% duty cycle
 parameter simulation_cycle = 10;
initial begin
clk = 0;
end
always begin
#(simulation_cycle/2) clk = ~clk;
end

//----------------------------------------------------------------------------//
Method #3 Using forever block and  negation operator for 50% duty cycle
initial begin
clk = 0;
forever begin
#5 clk = ~clk;
end
end

//----------------------------------------------------------------------------//
Method #4 Using forever block, negation operator and parameter for 50% duty cycle
    parameter simulation_cycle = 10;
initial begin
clk = 0;
forever begin
#(simulation_cycle/2) clk = ~clk;
end
end

//------------------------------------------------------------------------------------//
Method #5 using always block, directed low time and high time value for 50% duty cycle
initial begin
clk = 0;
end
always begin
#5 clk = 0;
#5 clk = 1;
end

//------------------------------------------------------------------------------------//
Method #6 using always block, directed low time and high time value and parameter for 50% duty cycle
    parameter simulation_cycle = 10;
initial begin
clk = 0;
end
always begin
#(simulation_cycle/2) clk = 0;
#(simulation_cycle/2) clk = 1;
end

//------------------------------------------------------------------------------------//
 There are different other ways also to generate the clock, but commonly these methods are used.

Monday, February 22, 2016

difference between uvm_resource_db & uvm_config_db

From the usage perspective there is no difference between these two and recommendation is to use uvm_config_db


Both uvm_config_db and uvm_resource_db share the same underlying database to store and retrieve information.

In-fact you can write a value to uvm database using uvm_config_db ::set() method and retrieve the information either using  uvm_config_db ::get() method or using uvm_resource_db::read_by_name().  

The recommended method is to use uvm_config_db when hierarchical access is required.  When you want to share object and access it from different location without using the hierarchy you can use uvm_resource_db.

You can set a resource to the resource db using the uvm_resource_db::set()  method
Example:
        uvm_resource_db# (int)::set("enable","*",1,this);

To retrieve the information from the resource db you can use uvm_resource_db::read_by_name() method

Example:
   Bit success;
   success=uvm_resource_db#(int)::read_by_name("enable",get_full_name(),value,this);
   If(success==1’b0)
      `uvm_error("ERROR","cannot locate the resource ");